Process

One buildup layer is one full lap of the line.

Laminate, drill, seed, plate, planarise. Add a buildup layer and the whole lap runs again. So “how many layers can you do” is not an equipment list — it is how many times this line repeats before registration drifts.

Core fabrication

Inner layers by conventional processing: LDI expose, develop, etch, strip, AOI. Not reworkable once laminated.

LDI registration 10 µm

Layup and vacuum lamination

1080 / 2116 prepreg with 12–18 µm copper foil per side, pressed under full vacuum. Resin flows and fills the copper topography.

180 °C / 300 PSI / 60 min

Laser drilling

CO₂ drills the 100 µm microvias. UV at 355 nm handles sub-100 µm and copper-defined vias. 75 µm top tapering to about 50 µm.

3000–5000 holes / second

Desmear and electroless copper

Three-stage wet desmear, or plasma for thin dielectrics. A dirty via bottom becomes a weak copper joint under thermal cycling.

Seed layer 0.3–0.5 µm

Pattern plating and via fill

Electrolytic copper fills bottom-up. Stacked vias must fill completely or the next layer has nothing flat to land on.

Trace copper 18–25 µm

Planarisation

Belt-sanded or ground coplanar. Unplanarised via bumps trap air under the next prepreg — an invisible void.

Coplanarity 3 µm · no dimple > 5 µm

Steps 02 to 06 repeat once per buildup layer on each face. The core is processed once.

Lead time

Each buildup step adds two to three days to the lap.

Registered separately: each added buildup layer re-runs the full cycle and costs 2–3 days, which is why step count and prototype lead time are the same conversation.

1 step1+N+18 days

2 steps2+N+210–11 days

3 steps3+N+313–14 days

4 steps4+N+416–17 days

5 steps5+N+519–20 days

6 stepsHBM / AP substrate22–23 days

7 stepsHighest density offered25–26 days

Inspection in process

Where we look, before it ships.

AOIAfter inner-layer etch and after outer-layer imagingPattern defects

Via fill and coplanarityChecked on the buildup layers, not on the finished boardPer layer

RegistrationMeasured layer to layer — ±25 µm is the HDI budgetPer cycle

Acceptance classes, inspection and reliability testing →

Send the stackup and we will tell you which of the six steps is the one that will bind on your design — before the panel is booked.

Engineering reply within 12 hours

Request a quote Build-up limits